Here our CTO, Michael Miller, will discuss insights into applications that he is interested in as well as applications that demonstrate how the Mosys Accelerator Engines can significantly improve FPGA design performance and simplify designs by giving software architect and hardware architects performance options not available before.
MoSys, a long time memory company, has used its application experience to design an Accelerator Engine that serially attaches to an FPGA and whose unique memory architectures, embedded memory functions for “Bandwidth” and “In Memory Computing”, a high speed-low pins count serial interface device actually defines a new memory space.
Add to the mix, 32 high performance RISC cores, and you have the ability to achieve what we call HyperSpeed performance with user defined embedded software.
Michael Miller, CTO … Has been with MoSys for 10 years. Prior, he was CTO and Systems Architecture at IDT. He has over 46 patents and holds the basic JTAG patent. See Michael’s biography on the MoSys Leadership page, under the About Us tab.
So, enjoy the technical exchange! We are always open to your suggestions for new topics.