SUNNYVALE, Calif.–(BUSINESS WIRE)–July 14, 2003–MoSys, Inc.
(Nasdaq:MOSY) the industry’s leading provider of high density SoC
embedded memory solutions, today announced it will port its innovative
quad density 1T-SRAM(R)-Q(TM) technology to UMC’s 0.13-micron and
90-nanometer logic processes. This extends the existing cooperation
between the companies to offer additional optimized high-density
memory solutions to UMC’s foundry customers, which already include the
0.13-micron silicon proven 1T-SRAM-R.

“We are pleased to cooperate with UMC for the support of our
1T-SRAM-Q technology,” noted Mark-Eric Jones, vice president and
general manager of Intellectual Property at MoSys. “This addition
broadens the range of options for UMC’s foundry customers requiring
integration from one to hundreds of megabits of SRAM in their SoCs.”

MoSys’ 1T-SRAM-Q technology achieves its exceptional density by
using bit cells of just 0.5-square microns in the 0.13-micron logic
process and 0.28-square microns in the 90-nanometer logic process.
Using only one additional, non-critical mask on the standard logic
process, 1T-SRAM-Q enables cost-effective integration of large amounts
of SRAM on SoC designs without any change to the other logic IP blocks
or libraries.


Founded in 1991, MoSys (Nasdaq:MOSY), develops, licenses and
markets innovative memory technologies for semiconductors. MoSys’
patented 1T-SRAM technologies offer a combination of high density, low
power consumption, high speed and low cost unmatched by other
available memory technologies. The single transistor bit cell used in
1T-SRAM memory results in the technology achieving much higher density
than traditional four or six transistor SRAMs, while using the same
standard logic manufacturing processes.1T-SRAM technologies also offer
the familiar, refresh-free interface and high performance for random
address access cycles associated with traditional SRAMs. In addition,
these technologies can reduce operating power consumption by a factor
of four compared with traditional SRAM technology, contributing to
making it ideal for embedding large memories in System on Chip (SoC)
designs. MoSys’ licensees have shipped more than 50 million chips
incorporating 1T-SRAM embedded memory, demonstrating the excellent
manufacturability of the technology in a wide range of silicon
processes and applications. MoSys is headquartered at 1020 Stewart
Drive, Sunnyvale, California 94085. More information is available on
MoSys’ website at

Note for Editors:

1T-SRAM(R) is a MoSys trademark registered in the U.S. Patent and
Trademark Office. All other trade, product, or service names
referenced in this release may be trademarks or registered trademarks
of their respective holders.