MoSys Chief Executive Officer Len Perham and VP of Technology Michael Miller to Host a Press Conference on Tuesday, February 2
SUNNYVALE, Calif., Jan 21, 2010 (BUSINESS WIRE) — MoSys,
Inc., a leading provider of differentiated, high-density memory and
high-speed interface (I/O) intellectual property (IP), today announced
that it will be attending DesignCon 2010, a premier annual technical
conference focused on semiconductor electronic design, in Santa Clara,
California and has planned the following activities.

Press Conference

Len Perham, president and CEO, and Michael Miller, VP of Technology
Innovation and System Applications, will discuss how MoSys is solving
networking bandwidth issues by unveiling both an innovative,
market-changing product and the expansion of MoSys’ overall business
strategy. The press conference will be held on February 2, 2010 at 9
a.m. PST and will be webcast live. A replay will also be available after
the event on the MoSys website. Information about the webcast will be
available at http://www.mosys.com
later this month.

Standards Discussion, Technical Panel and Exhibit at DesignCon 2010

On Monday February 1 at 1 p.m. PST, MoSys will participate in the
tutorial, “Best Practices for IP Re-Use.” As a member of Global
Semiconductor Alliance (GSA) and active participant of the GSA IP
Working Group, MoSys will present at this educational tutorial about
best practices of IP reuse.

In addition, MoSys is sponsoring a technical panel discussion on
Wednesday, February 3 at 3:45 p.m. PST featuring numerous industry
experts. The topic, “Meeting chip to chip I/O demands of 100G & beyond
line cards,” promises to induce an interesting and lively discussion.

About MoSys, Inc.

Founded in 1991, MoSys(R) (NASDAQ: MOSY), develops, markets and licenses
differentiated embedded memory and high speed parallel and serial
interface IP for advanced SoC designs. MoSys’ patented 1T-SRAM(R) and
1T-Flash(R) memory technologies offer a combination of high density, low
power consumption, high speed and low cost advantages that are unmatched
by other available memory technologies for a variety of networking,
computing, storage and consumer/graphics applications. MoSys’
silicon-proven interface IP portfolio includes DDR3 PHYs, as well as
SerDes IP that support data rates from 1 Gigabit per second (Gbps) to 11
Gbps, across a wide range of standards, including PCI Express, XAUI,
SATA and 10G KR. MoSys IP has been production-proven in more than 225
million devices.

MoSys is headquartered in Sunnyvale, California. More information is
available on MoSys’ website at www.mosys.com.

MoSys, 1T-SRAM and 1T-Flash are registered trademarks of MoSys, Inc. The
MoSys logo is a trademark of MoSys, Inc. All other trademarks mentioned
herein are the intellectual property of their respective owners.

SOURCE: MoSys, Inc.

MoSys, Inc.
Kristine Perham, 408-731-1804
kperham@mosys.com