Chartered’s Customers Benefit from Proven IP With Highest Density
of Any Third-Party, Open Offering of Embedded High-Performance RAM

SUNNYVALE, Calif. and SINGAPORE–(BUSINESS WIRE)–July 27, 2004–

MoSys, Inc. (Nasdaq:MOSY), the industry’s leading provider of
advanced high density embedded memory solutions, and Chartered
Semiconductor Manufacturing (Nasdaq:CHRT) (SGX:CHARTERED), one of the
world’s top three dedicated semiconductor foundries, today announced
the silicon validation of MoSys 1T-SRAM-Q(TM) (Quad density) embedded
memory technology on Chartered’s 0.13-micron industry-standard logic
process. Their joint efforts have produced functional silicon devices
and already resulted in new design engagements with mutual customers.
The final phases of qualification are underway with full
characterization data to be available by the end of the third quarter
2004.

With a complete macro density of approximately 1.2-square
millimeters per megabit, 1T-SRAM-Q technology enables designers to
embed even larger high-performance memories in their system-on-chip
(SoC) designs. 1T-SRAM-Q technology incorporates MoSys’ proprietary
Transparent Error Correction(TM) (TEC(TM)) technology delivering the
additional benefits of improved yield and reliability with elimination
of laser repair and soft error concerns.

“Chartered’s 0.13 silicon verification of 1T-SRAM-Q memory
demonstrates MoSys’ continued commitment to develop the best-in-class
memory technology,” commented Dr. Fu-Chieh Hsu, president and CEO of
MoSys. “Now, SoC designers can integrate over 100 megabits of
high-performance embedded memory in 0.13-micron designs.”

1T-SRAM-Q memory is based on MoSys’ patented Folded Area
Capacitor(TM) (FAC (TM)) technology to reduce bit cell size by
literally folding the bit cell gate oxide capacitor vertically down
the STI sidewall, thus dramatically reducing the horizontal area. This
results in typical bit cell sizes of 0.57 square microns at the
0.13-micron process node.

“The memory requirements of our customers are increasing over time
and with each technology node. By coupling MoSys’ high-density
embedded memory technologies with our production-proven 0.13-micron
process, we’re giving designers more choices,” said Kevin Meyer, vice
president of worldwide marketing and services at Chartered. “With
access to these world-class solutions, our customers can reduce the
risks of implementing leading-edge, memory-intensive SoCs and still
target the highest possible yields.”

The 1T-SRAM-Q validation effort is an extension of the ongoing
collaboration by the two companies to offer optimized high-density
memory solutions on multiple technology generations and products.
MoSys and Chartered have already successfully qualified MoSys’
1T-SRAM-R high-density memory solution on Chartered’s 0.18-micron and
0.13-micron process technologies. The companies are in the process of
qualifying the 1T-SRAM-R technology on the 90nm process platform
jointly developed by Chartered and IBM.

About Chartered

Chartered Semiconductor Manufacturing, one of the world’s top
three dedicated foundries, is forging a customized approach to
outsourced semiconductor manufacturing by building lasting and
collaborative partnerships with its customers. The company provides
flexible and cost-effective manufacturing solutions for customers,
enabling the convergence of communications, computing and consumer
markets. In Singapore, Chartered operates four fabrication facilities
and has a fifth fab, the Company’s first 300mm facility, which is
expected to begin pilot production by the end of 2004.

A company with both global presence and perspective, Chartered is
traded on both the Nasdaq Stock Market (Nasdaq:CHRT) and on the
Singapore Exchange (SGX:CHARTERED). Information about Chartered can be
found at http://www.charteredsemi.com

About MoSys

Founded in 1991, MoSys (Nasdaq:MOSY), develops, licenses and
markets innovative memory technologies for semiconductors. MoSys’
patented 1T-SRAM technologies offer a combination of high density, low
power consumption, high speed and low cost unmatched by other
available memory technologies. The single transistor bit cell used in
1T-SRAM memory results in the technology achieving much higher density
than traditional four or six transistor SRAMs, while using the same
standard logic manufacturing processes.

1T-SRAM technologies also offer the familiar, refresh-free
interface and high performance for random address access cycles
associated with traditional SRAMs. In addition, these technologies can
reduce operating power consumption by a factor of four compared with
traditional SRAM technology, contributing to making it ideal for
embedding large memories in System on Chip (SoC) designs. MoSys’
licensees have shipped more than 50 million chips incorporating
1T-SRAM embedded memories, demonstrating the excellent
manufacturability of the technology in a wide range of silicon
processes and applications. MoSys is headquartered at 1020 Stewart
Drive, Sunnyvale, Calif. 94085. More information is available on
MoSys’ website at http://www.mosys.com.

1T-SRAM(R) is a MoSys trademark registered in the U.S. Patent and
Trademark Office. All other trade, product, or service names
referenced in this release may be trademarks or registered trademarks
of their respective holders.

Chartered Safe Harbor Statement under the provisions of the
United States Private Securities Litigation Reform Act of 1995

This news release may contain forward-looking statements, as
defined in the safe harbor provisions of the U.S. Private Securities
Litigation Reform Act of 1995. These forward-looking statements
reflect our current views with respect to future events, and are
subject to certain risks and uncertainties, which could cause actual
results to differ materially from historical results or those
anticipated. For example: changes in market outlook; the rate of
semiconductor market recovery; economic conditions in the United
States as well as globally; customer demands; the performance level of
our fabrication facilities; the successful implementation of our joint
efforts with MoSys and competition. Although we believe the
expectations reflected in such forward-looking statements are based
upon reasonable assumptions, we can give no assurance that our
expectations will be attained. In addition to the foregoing factors, a
description of certain other risks and uncertainties which could cause
actual results to differ materially can be found in the section
captioned “Risk Factors” in our Annual Report on Form 20-F filed with
the U.S. Securities and Exchange Commission. You are cautioned not to
place undue reliance on these forward-looking statements, which are
based on the current view of management on future events. We undertake
no obligation to publicly update or revise any forward-looking
statements, whether as a result of new information, future events or
otherwise.

CONTACT: MoSys, Sunnyvale
K.T. Boyle, 408-731-1830
kboyle@mosys.com
or
Chartered Semiconductor Manufacturing, Milpitas
Tiffany Sparks, 408-941-1185
tiffanys@charteredsemi.com

SOURCE: MoSys, Inc.